1. Field of the Invention
The present invention relates to a semiconductor device which generates heat when it operates.
2. Description of Related Art
To enable a semiconductor device such as GaAs power FET chips to obtain a large output, the gate width thereof is widened, this being accompanied by an increase in the chip size as well as an increase in the amount of heat that is generated when the device operates, making it necessary to efficiently release this heat during operation.
Because of this need, in the past, as shown with regard to a GaAs power FET chip 1 in FIG. 4, the thickness of the GaAs substrate 4 of the GaAs chip 1 is made small, a gold plating 5 is applied to the rear surface of the GaAs substrate 4, and an AuSn row material 3 that is applied to this gold plating 5 is used to mount the GaAs FET chip into a package 2. By adopting the construction that is shown in FIG. 4, it is possible to achieve good heat release and a reduction in the thermal resistance.
However, with the construction which is shown in FIG. 4, because the surface area of the linkage between the chip 1 and the package 2 is large, there is a tendency for a large number of voids 6 to occur in the AuSn row material 3.
In FIG. 4, in the case in which the locations at which the voids 6 occur are collected at heat-generating regions 7, the existence of the voids 6 worsens the release of heat from the chip 1, this causing a local rise in temperature at the location of the voids 6 that is greater than other regions, the subsequently leading to a deterioration in the chip characteristics and a decrease in the resistance of the chip to damage.
For this reason, in the Japanese Unexamined Patent Publication No.H3-82145, there is a disclosure of technology for suppressing the occurrence of voids. The technology disclosed in the above-noted Japanese Unexamined Patent Publication No.H3-82145 is that in which there is the problem that, although it might be possible that the voids could be broken up into finer parts, it is not possible to prevent the occurrence of a void within the solder layer that is applied immediately under the heat-generating region of the chip surface, so that it is not possible to improve the dispersion of heat from the chip.
In view of the above-noted problem, an object of the present invention is to provide a semiconductor device which prevents the occurrence of voids immediately under the heat-generating region of a chip.